Anderon — America's first quantum chip foundry
2026-05IBM is spinning off Anderon, a $2B (≈$1B CHIPS Act + $1B IBM) 300mm superconducting-qubit wafer fab in Albany, NY — open to other quantum vendors as a neutral 'TSMC for quantum.'
Superconducting-qubit pioneer with a public roadmap; built the 1,121-qubit Condor.
Editorial profile — compiled by us from public sources.
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IBM is spinning off Anderon, a $2B (≈$1B CHIPS Act + $1B IBM) 300mm superconducting-qubit wafer fab in Albany, NY — open to other quantum vendors as a neutral 'TSMC for quantum.'
IBM pledged more than $10B over five years — R&D, capex, manufacturing and M&A — to fund its roadmap toward the world's first large-scale, fault-tolerant quantum computer by 2029.
IBM reported three separate quantum-advantage demonstrations paired with methods for trusting results that cannot be classically checked: with the University of Chicago, a ~15-minute computation certified via doped Clifford sampling and spacetime codes; with Qedma (plus RIKEN and BlueQubit), validated error mitigation; with Algorithmiq, validation of the computation process rather than the answer. A companion run encoded 70 logical qubits with logical error rates about 10x below the physical ones. Recorded as a claim, not a settled result: the demonstrations are company-led and the field is still pressure-testing both the advantage and the verification.
IBM completed its acquisition of HRL Laboratories on 26 Aug 2026, adding silicon-spin qubits to a roadmap built entirely on superconducting transmons, along with HRL's quantum sensing, cryogenics, control electronics and packaging work. Boeing and General Motors, HRL's former owners, stay on as partners. Terms were not disclosed. Silicon spin qubits are the modality that could ride existing semiconductor fabs, which is why IBM ties it to Anderon, its quantum wafer foundry — but this buys a research program, not a working machine: IBM's shipping systems remain superconducting.
IBM demonstrated the world's first sub-1nm (0.7nm / 7Å "nanostack") logic transistor architecture, experimentally validated at the 2026 VLSI Symposium with functional CMOS inverters and ~100B transistors on a fingernail-sized die. A research milestone — not a product: IBM is still scaling 2nm and sees production as early as ~5 years out. (Aggregator coverage conflated this with the separate 'Anderon' quantum-chip foundry plan.)